Datasheet
133
7728G–AVR–06/10
ATtiny87/ATtiny167
Table 12-2 shows the COM1A/B1:0 bit functionality when the WGM13:0 bits are set to the fast
PWM mode.
Note: 1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set. In
this case the compare match is ignored, but the set or clear is done at TOP. See “Fast PWM
Mode” on page 124. for more details.
Table 12-3 shows the COM1A/B1:0 bit functionality when the WGM13:0 bits are set to the
phase correct or the phase and frequency correct, PWM mode.
Note: 1. A special case occurs when OC1A/OC1B equals TOP and COM1A1/COM1B1 is set. See
“Phase Correct PWM Mode” on page 126. for more details.
• Bit 3:2 – Reserved Bits
These bits are reserved for future use.
Table 12-2. Compare Output Mode, Fast PWM
(1)
OC1Ai
OC1Bi
COM1A1
COM1B1
COM1A0
COM1B0 Description
0x x
Normal port operation, OC1A/OC1B disconnected.
10 0
10 1
WGM13=0: Normal port operation, OC1A/OC1B
disconnected.
WGM13=1: Toggle OC1A on Compare Match, OC1B
reserved.
11 0
Clear OC1A/OC1B on Compare Match
Set OC1A/OC1B at TOP
11 1
Set OC1A/OC1B on Compare Match
Clear OC1A/OC1B at TOP
Table 12-3. Compare Output Mode, Phase Correct and Phase and Frequency Correct
PWM
(1)
OC1Ai
OC1Bi
COM1A1
COM1B1
COM1A0
COM1B0 Description
0x x
Normal port operation, OC1A/OC1B disconnected.
10 0
10 1
WGM13=0: Normal port operation, OC1A/OC1B
disconnected.
WGM13=1: Toggle OC1A on Compare Match, OC1B
reserved.
11 0
Clear OC1A/OC1B on Compare Match when up-counting.
Set OC1A/OC1B on Compare Match when downcounting.
11 1
Set OC1A/OC1B on Compare Match when up-counting.
Clear OC1A/OC1B on Compare Match when downcounting.