Datasheet

8
ATtiny1634 [DATASHEET]
Atmel-8303HS-AVR-ATtiny1634-Summary_02/2014
Note: 1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses should never be written.
2. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the value of single bits can
be checked by using the SBIS and SBIC instructions.
3. Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI instructions will only operation the
specified bit, and can therefore be used on registers containing such Status Flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only.
0x2B (0x4B) USISR USISIF USIOIF USIPF USIDC USICNT3 USICNT2 USICNT1 USICNT0 142
0x2A (0x4A) USICR USISIE USIOIE USIWM1 USIWM0 USICS1 USICS0 USICLK USITC 140
0x29 (0x49) PCMSK2 PCINT17 PCINT16 PCINT15 PCINT14 PCINT13 PCINT12 52
0x28 (0x48) PCMSK1 PCINT11 PCINT10 PCINT9 PCINT8 53
0x27 (0x47) PCMSK0 PCINT7 PCINT6 PCINT5 PCINT4 PCINT3 PCINT2 PCINT1 PCINT0 53
0x26 (0x46) UCSR0A RXC0 TXC0 UDRE0 FE0 DOR0 UPE0 U2X0 MPCM 167
0x25 (0x45) UCSR0B RXCIE0 TXCIE0 UDRIE0 RXEN0 TXEN0 UCSZ02 RXB80 TXB80 168
0x24 (0x44) UCSR0C UMSEL01 UMSEL00 UPM01 UPM00 USBS0 UCSZ01 UCSZ00 UCPOL0 169
0x23 (0x43) UCSR0D RXCIE0 RXS0 SFDE0 171
0x22 (0x42) UBRR0H USART0 Baud Rate Register High Byte 172
0x21 (0x41) UBRR0L USART0 Baud Rate Register Low Byte 172
0x20 (0x40) UDR0 USART0 I/O Data Register 167
0x1F (0x3F) EEARH
0x1E (0x3E) EEARL EEAR[7:0] 22
0x1D (0x3D) EEDR EEPROM Data Register 22
0x1C (0x3C) EECR EEPM1 EEPM0 EERIE EEMPE EEPE EERE 22
0x1B (0x3B) TCCR0A COM0A1 COM0A0 COM0B1 COM0B0 –WGM01WGM00 84
0x1A (0x3A) TCCR0B FOC0A FOC0B WGM02 CS02 CS01 CS00 86
0x19 (0x39) TCNT0 Timer/Counter0 88
0x18 (0x38) OCR0A Timer/Counter0 – Compare Register A 88
0x17 (0x37) OCR0B Timer/Counter0 – Compare Register B 88
0x16 (0x36) GPIOR2 General Purpose Register 2 23
0x15 (0x35) GPIOR1 General Purpose Register 1 24
0x14 (0x34) GPIOR0 General Purpose Register 0 24
0x13 (0x33) PORTCR BBMC BBMB BBMA 71
0x12 (0x32) PUEA PUEA7 PUEA6 PUEA5 PUEA4 PUEA3 PUEA2 PUEA1 PUEA0 71
0x11 (0x31) PORTA PORTA7 PORTA6 PORTA5 PORTA4 PORTA3 PORTA2 PORTA1 PORTA0 71
0x10 (0x30) DDRA DDA7 DDA6 DDA5 DDA4 DDA3 DDA2 DDA1 DDA0 71
0x0F (0x2F) PINA PINA7 PINA6 PINA5 PINA4 PINA3 PINA2 PINA1 PINA0 71
0x0E (0x2E) PUEB PUEB3 PUEB2 PUEB1 PUEB0 72
0x0D (0x2D) PORTB PORTB3 PORTB2 PORTB1 PORTB0 72
0x0C (0x2C) DDRB DDB3 DDB2 DDB1 DDB0 72
0x0B (0x2B) PINB PINB3 PINB2 PINB1 PINB0 72
0x0A (0x2A) PUEC PUEC5 PUEC4 PUEC3 PUEC2 PUEC1 PUEC0 72
0x09 (0x29) PORTC PORTC5 PORTC4 PORTC3 PORTC2 PORTC1 PORTC0 72
0x08 (0x28) DDRC DDC5 DDC4 DDC3 DDC2 DDC1 DDC0 72
0x07 (0x27) PINC PINC5 PINC4 PINC3 PINC2 PINC1 PINC0 72
0x06 (0x26) ACSRA ACD ACBG ACO ACI ACIE ACIC ACIS1 ACIS0 182
0x05 (0x25) ACSRB HSEL HLEV ACLP ACCE ACME ACIRS1 ACIRS0 183
0x04 (0x24) ADMUX REFS1 REFS0 REFEN ADC0EN MUX3 MUX2 MUX1 MUX0 196
0x03 (0x23) ADCSRA ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0 197
0x02 (0x22) ADCSRB VDEN VDPD ADLAR ADTS2 ADTS1 ADTS0 199
0x01 (0x21) ADCH ADC Data Register High Byte 198
0x00 (0x20) ADCL ADC Data Register Low Byte 198
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page(s)