Datasheet
Table Of Contents
- Features
- Pin Configuration
- Description
- Architectural Overview
- General-purpose Register File
- ALU – Arithmetic Logic Unit
- Flash Program Memory
- Program and Data Addressing Modes
- Subroutine and Interrupt Hardware Stack
- EEPROM Data Memory
- Memory Access and Instruction Execution Timing
- I/O Memory
- Reset and Interrupt Handling
- ATtiny12 Internal Voltage Reference
- Interrupt Handling
- Sleep Modes for the ATtiny11
- Sleep Modes for the ATtiny12
- ATtiny12 Calibrated Internal RC Oscillator
- Timer/Counter0
- Watchdog Timer
- ATtiny12 EEPROM Read/Write Access
- Analog Comparator
- I/O Port B
- Memory Programming
- Program (and Data) Memory Lock Bits
- Fuse Bits in ATtiny11
- Fuse Bits in ATtiny12
- Signature Bytes
- Calibration Byte in ATtiny12
- Programming the Flash and EEPROM
- High-voltage Serial Programming
- High-voltage Serial Programming Algorithm
- High-voltage Serial Programming Characteristics
- Low-voltage Serial Downloading (ATtiny12 only)
- Low-voltage Serial Programming Characteristics
- Electrical Characteristics
- Register Summary ATtiny11
- Register Summary ATtiny12
- Instruction Set Summary
- Ordering Information
- Packaging Information
- Data Sheet Change Log for ATtiny11/12
- Table of Contents
67
ATtiny11/12
1006D–AVR–07/03
Figure 47. Analog Comparator Input Leakage Current
Figure 48. Watchdog Oscillator Frequency vs. V
CC
60
50
40
30
20
10
0
-10
0 0.5 1.51 2 2.5 3.53 4 4.5 5 6 6.5 75.5
ANALOG COMPARATOR INPUT LEAKAGE CURRENT
T = 25˚C
A
I (nA)
ACLK
V (V)
IN
V = 6V
CC
0
200
400
600
800
1000
1200
1400
1600
1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
T = 85˚C
A
T = 25˚C
A
WATCHDOG OSCILLATOR FREQUENCY vs. V
cc
V (V)
CC
F (kHz)
RC