Datasheet
Table Of Contents
- Features
- Pin Configuration
- Description
- Architectural Overview
- General-purpose Register File
- ALU – Arithmetic Logic Unit
- Flash Program Memory
- Program and Data Addressing Modes
- Subroutine and Interrupt Hardware Stack
- EEPROM Data Memory
- Memory Access and Instruction Execution Timing
- I/O Memory
- Reset and Interrupt Handling
- ATtiny12 Internal Voltage Reference
- Interrupt Handling
- Sleep Modes for the ATtiny11
- Sleep Modes for the ATtiny12
- ATtiny12 Calibrated Internal RC Oscillator
- Timer/Counter0
- Watchdog Timer
- ATtiny12 EEPROM Read/Write Access
- Analog Comparator
- I/O Port B
- Memory Programming
- Program (and Data) Memory Lock Bits
- Fuse Bits in ATtiny11
- Fuse Bits in ATtiny12
- Signature Bytes
- Calibration Byte in ATtiny12
- Programming the Flash and EEPROM
- High-voltage Serial Programming
- High-voltage Serial Programming Algorithm
- High-voltage Serial Programming Characteristics
- Low-voltage Serial Downloading (ATtiny12 only)
- Low-voltage Serial Programming Characteristics
- Electrical Characteristics
- Register Summary ATtiny11
- Register Summary ATtiny12
- Instruction Set Summary
- Ordering Information
- Packaging Information
- Data Sheet Change Log for ATtiny11/12
- Table of Contents
2
ATtiny11/12
1006D–AVR–07/03
Description The ATtiny11/12 is a low-power CMOS 8-bit microcontroller based on the AVR RISC
architecture. By executing powerful instructions in a single clock cycle, the ATtiny11/12
achieves throughputs approaching 1 MIPS per MHz, allowing the system designer to
optimize power consumption versus processing speed.
The AVR core combines a rich instruction set with 32 general-purpose working regis-
ters. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU),
allowing two independent registers to be accessed in one single instruction executed in
one clock cycle. The resulting architecture is more code efficient while achieving
throughputs up to ten times faster than conventional CISC microcontrollers.
ATtiny11 Block Diagram The ATtiny11 provides the following features: 1K bytes of Flash, up to five general-pur-
pose I/O lines, one input line, 32 general-purpose working registers, an 8-bit
timer/counter, internal and external interrupts, programmable Watchdog Timer with
internal oscillator, and two software-selectable power-saving modes. The Idle Mode
stops the CPU while allowing the timer/counters and interrupt system to continue func-
tioning. The Power-down Mode saves the register contents but freezes the oscillator,
disabling all other chip functions until the next interrupt or hardware reset. The wake-up
or interrupt on pin change features enable the ATtiny11 to be highly responsive to exter-
nal events, still featuring the lowest power consumption while in the power-down modes.
The device is manufactured using Atmel’s high-density nonvolatile memory technology.
By combining an RISC 8-bit CPU with Flash on a monolithic chip, the Atmel ATtiny11 is
a powerful microcontroller that provides a highly-flexible and cost-effective solution to
many embedded control applications.
The ATtiny11 AVR is supported with a full suite of program and system development
tools including: macro assemblers, program debugger/simulators, in-circuit emulators,
and evaluation kits.
Table 1. Parts Description
Device Flash EEPROM Register Voltage Range Frequency
ATtiny11L 1K - 32 2.7 - 5.5V 0-2 MHz
ATtiny11 1K - 32 4.0 - 5.5V 0-6 MHz
ATtiny12V 1K 64 B 32 1.8 - 5.5V 0-1.2 MHz
ATtiny12L 1K 64 B 32 2.7 - 5.5V 0-4 MHz
ATtiny12 1K 64 B 32 4.0 - 5.5V 0-8 MHz