Datasheet
Table Of Contents
- Features
- Pin Configuration
- Description
- Architectural Overview
- General-purpose Register File
- ALU – Arithmetic Logic Unit
- Flash Program Memory
- Program and Data Addressing Modes
- Subroutine and Interrupt Hardware Stack
- EEPROM Data Memory
- Memory Access and Instruction Execution Timing
- I/O Memory
- Reset and Interrupt Handling
- ATtiny12 Internal Voltage Reference
- Interrupt Handling
- Sleep Modes for the ATtiny11
- Sleep Modes for the ATtiny12
- ATtiny12 Calibrated Internal RC Oscillator
- Timer/Counter0
- Watchdog Timer
- ATtiny12 EEPROM Read/Write Access
- Analog Comparator
- I/O Port B
- Memory Programming
- Program (and Data) Memory Lock Bits
- Fuse Bits in ATtiny11
- Fuse Bits in ATtiny12
- Signature Bytes
- Calibration Byte in ATtiny12
- Programming the Flash and EEPROM
- High-voltage Serial Programming
- High-voltage Serial Programming Algorithm
- High-voltage Serial Programming Characteristics
- Low-voltage Serial Downloading (ATtiny12 only)
- Low-voltage Serial Programming Characteristics
- Electrical Characteristics
- Register Summary ATtiny11
- Register Summary ATtiny12
- Instruction Set Summary
- Ordering Information
- Packaging Information
- Data Sheet Change Log for ATtiny11/12
- Table of Contents

17
ATtiny11/12
1006D–AVR–07/03
Reset Sources The ATtiny11/12 provides three or four sources of reset:
• Power-on Reset. The MCU is reset when the supply voltage is below the power-on
reset threshold (V
POT
).
• External Reset. The MCU is reset when a low level is present on the RESET
pin for
more than 50 ns.
• Watchdog Reset. The MCU is reset when the Watchdog timer period expires and
the Watchdog is enabled.
• Brown-out Reset. The MCU is reset when the supply voltage V
CC
falls below a
certain voltage (ATtiny12 only).
During reset, all I/O registers are then set to their initial values, and the program starts
execution from address $000. The instruction placed in address $000 must be an RJMP
– relative jump – instruction to the reset handling routine. If the program never enables
an interrupt source, the interrupt vectors are not used, and regular program code can be
placed at these locations. The circuit diagram in Figure 16 shows the reset logic for the
ATtiny11. Figure 17 shows the reset logic for the ATtiny12. Table 6 defines the electrical
parameters of the reset circuitry for ATtiny11. Table 8 shows the parameters of the reset
circuitry for ATtiny12.
Figure 16. Reset Logic for the ATtiny11
Note: 1. The Power-on Reset will not work unless the supply voltage has been below V
POT
(falling).
Table 6. Reset Characteristics for the ATtiny11
Symbol Parameter Min Typ Max Units
V
POT
(1)
Power-on Reset Threshold Voltage (rising) 1.0 1.4 1.8 V
Power-on Reset Threshold Voltage (falling) 0.4 0.6 0.8 V
V
RST
RESET Pin Threshold Voltage 0.6 V
CC
V
Power-on Reset
Circuit
Reset Circuit
Watchdog
Timer
On-chip
RC Oscillator
20-stage Ripple Counter
Q3 Q19
Q13
Q9
Q
QS
R
INTERNAL
RESET
POR
VCC
RESET
COUNTER RESET
FSTRT
CKSEL