Datasheet

1
ATtiny4/5/9/10 [DATASHEET]
8127F–AVR–02/2013
Table of Contents
Features .....................................................................................................1
1 Pin Configurations ...................................................................................2
1.1 Pin Description ..................................................................................................2
2 Overview ...................................................................................................3
2.1 Comparison of ATtiny4, ATtiny5, ATtiny9 and ATtiny10 ....................................4
3 General Information .................................................................................5
3.1 Resources .........................................................................................................5
3.2 Code Examples .................................................................................................5
3.3 Capacitive Touch Sensing .................................................................................5
3.4 Data Retention ...................................................................................................5
4CPU Core ...................................................................................................6
4.1 Architectural Overview .......................................................................................6
4.2 ALU – Arithmetic Logic Unit ...............................................................................7
4.3 Status Register ..................................................................................................7
4.4 General Purpose Register File ..........................................................................7
4.5 Stack Pointer .....................................................................................................9
4.6 Instruction Execution Timing .............................................................................9
4.7 Reset and Interrupt Handling ...........................................................................10
4.8 Register Description ........................................................................................11
5 Memories .................................................................................................14
5.1 In-System Re-programmable Flash Program Memory ....................................14
5.2 Data Memory ...................................................................................................14
5.3 I/O Memory ......................................................................................................16
6 Clock System ..........................................................................................17
6.1 Clock Subsystems ...........................................................................................17
6.2 Clock Sources .................................................................................................18
6.3 System Clock Prescaler ..................................................................................19
6.4 Starting ............................................................................................................20
6.5 Register Description ........................................................................................21
7 Power Management and Sleep Modes .................................................23
7.1 Sleep Modes ....................................................................................................23
7.2 Power Reduction Register ...............................................................................24
7.3 Minimizing Power Consumption ......................................................................24