Datasheet

163
ATtiny4/5/9/10 [DATASHEET]
8127F–AVR–02/2013
“SMCR – Sleep Mode Control Register” on page 25
“PRR – Power Reduction Register” on page 26
“Alternate Functions of Port B” on page 48
“Overview” on page 82
“Physical Layer of Tiny Programming Interface” on page 95
“Overview” on page 106
“ADC Characteristics (ATtiny5/10, only)” on page 119
“Supply Current of I/O Modules” on page 121
“Register Summary” on page 148
“Ordering Information” on page 152
5. Added figure:
“Using an External Programmer for In-System Programming via TPI” on page 96
6. Updated figure:
“Data Memory Map (Byte Addressing)” on page 15
7. Added table:
“Number of Words and Pages in the Flash (ATtiny4/5)” on page 108
8. Updated tables:
“Active Clock Domains and Wake-up Sources in Different Sleep Modes” on page 23
“Reset and Interrupt Vectors” on page 35
“Number of Words and Pages in the Flash (ATtiny9/10)” on page 107
“Signature codes” on page 109
23.6 Rev. 8127A – 04/09
1. Initial revision