Datasheet

578
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
Figure 32-3. ADC Input
To achieve n bits of accuracy, the capacitor must be charged at least to a voltage of
The minimum sampling time for a given can be found using this formula:
for a 12 bits accuracy:
where
32.8.5 Digital to Analog Converter (DAC) Characteristics
Table 32-22. Operating Conditions
(1)
Notes: 1. These values are based on specifications otherwise noted.
2. These values are based on characterization. These values are not covered by test limits in production.
R
SOURCE
R
SAMPLE
Analog Input
AINx
C
SAMPLE
V
IN
VDDANA/2
C
SAMPLE
V
CSAMPLE
V≥
IN
12
n 1+()–
–()×
t
SAMPLEHOLD
R
SOURCE
t
SAMPLEHOLD
R
SAMPLE
R+
SOURCE
()C
SAMPLE
()× n 1+() 2()ln××≥
t
SAMPLEHOLD
R
SAMPLE
R+
SOURCE
()C
SAMPLE
()× 9.02×≥
t
SAMPLEHOLD
1
2 f
ADC
×
---------------------
=
Symbol Parameter Conditions Min. Typ. Max. Units
V
DDANA
Analog supply voltage
I
1.62 - 3.63 V
AV
REF
External reference voltage
I
1.0 - V
DDANA
-0.6 V
Internal reference voltage 1 - 1 - V
Internal reference voltage 2 - V
DDANA
- V
I
Linear output voltage range
I
0.05 - V
DDANA
-0.05 V
I
Minimum resistive load
I
5 - - kΩ
I
Maximum capacitance load
I
- - 100 pF
i
DD
DC supply current
(2)
Voltage pump disabled - 160 230 µA