Datasheet

417
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
26.8.1.7 Address
Name: ADDR
Offset: 0x14
Reset: 0x00000000
Property: Write-Protected, Enable-Protected
z Bits 31:24 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bits 23:17 – ADDRMASK[6:0]: Address Mask
The ADDRMASK bits acts as a second address match register, an address mask register or the lower limit of an
address range, depending on the CTRLB.AMODE setting.
z Bits 16:8 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bits 7:1 – ADDR[6:0]: Address
The slave address (ADDR) bits contain the I
2
C slave address used by the slave address match logic to determine
if a master has addressed the slave. When using 7-bit addressing, the address register (ADDR.ADDR) represents
the slave address.
If using 10-bit addressing, the address match logic only supports hardware address recognition of the first 2 bits of
a 10-bit address. If writing ADDR.ADDR = "0b1111 0xx," 'xx' represents bits 9 and 8 or the slave address. The next
byte received is bits 7 to 0 in the 10-bit address, and this must be handled by software.
Bit3130292827262524
AccessRRRRRRRR
Reset00000000
Bit2322212019181716
ADDRMASK[6:0]
Access R/W R/W R/W R/W R/W R/W R/W R
Reset00000000
Bit151413121110 9 8
AccessRRRRRRRR
Reset00000000
Bit76543210
ADDR[6:0] GENCEN
Access R/W R/W R/W R/W R/W R/W R/W R/W
Reset00000000