Datasheet

252
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
19.8.6 Interrupt Enable Clear
This register allows the user to disable an interrupt without doing a read-modify-write operation. Changes in this register
will also be reflected in the Interrupt Enable Set register (INTENSET).
Name: INTENCLR
Offset: 0x08
Reset: 0x00000000
Property: Write-Protected
z Bits 31:16 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bits 15:0 – EXTINT: External Interrupt x Enable
0: The external interrupt x is disabled.
1: The external interrupt x is enabled.
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the External Interrupt x Enable bit, which enables the external interrupt.
Bit 3130292827262524
AccessRRRRRRRR
Reset00000000
Bit 2322212019181716
AccessRRRRRRRR
Reset00000000
Bit 151413121110 9 8
EXTINT[15:8]
Access R/W R/W R/W R/W R/W R/W R/W R/W
Reset00000000
Bit 76543210
EXTINT[7:0]
Access R/W R/W R/W R/W R/W R/W R/W R/W
Reset00000000