Datasheet

Table Of Contents
246
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
19.8 Register Description
Registers can be 8, 16 or 32 bits wide. Atomic 8-, 16- and 32-bit accesses are supported. In addition, the 8-bit quarters
and 16-bit halves of a 32-bit register and the 8-bit halves of a 16-bit register can be accessed directly.
Some registers are optionally write-protected by the Peripheral Access Controller (PAC). Write-protection is denoted by
the Write-protected property in each individual register description. Refer to “Register Access Protection” on page 241 for
details.
Some registers require synchronization when read and/or written. Synchronization is denoted by the Synchronized
property in each individual register description. Refer to “Synchronization” on page 244 for details.
Some registers are enable-protected, meaning they can be written only when the EIC is disabled. Enable-protection is
denoted by the Enabled-Protected property in each individual register description.