Datasheet

149
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
16.8.3 Interrupt Flag Status and Clear
Name: INTFLAG
Offset: 0x08
Reset: 0x00000000
Property: -
Note: Depending on the fuse settings, various bits of the INTFLAG register can be set to one at startup. Therefore the user should clear those bits before using
the corresponding interrupts.
z Bits 31:12 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bit 11 – B33SRDY: BOD33 Synchronization Ready
This flag is cleared by writing a one to it.
This flag is set on a zero-to-one transition of the BOD33 Synchronization Ready bit in the Status register
(PCLKSR.B33SRDY) and will generate an interrupt request if INTENSET.B33SRDY is one.
Writing a zero to this bit has no effect.
Writing a one to this bit clears the BOD33 Synchronization Ready interrupt flag
z Bit 10 – BOD33DET: BOD33 Detection
This flag is cleared by writing a one to it.
This flag is set on a zero-to-one transition of the BOD33 Detection bit in the Status register (PCLKSR.BOD33DET)
and will generate an interrupt request if INTENSET.BOD33DET is one.
Bit313029282726 2524
Access R R R R R R R R
Reset000000 00
Bit232221201918 1716
Access R R R R R R R R
Reset000000 00
Bit151413121110 9 8
B33SRDY BOD33DET BOD33RDY DFLLRCS
Access
RRRRR/W R/W R/W R/W
Reset
0 0 0 0 0 0 0 0
Bit
7 6 5 4 3 2 1 0
DFLLLCKC DFLLLCKF DFLLOOB DFLLRDY OSC8MRDY OSC32KRDY XOSC32KRDY XOSCRDY
Access R/W R/W R/W R/W R/W R/W R/W R/W
Reset000000 00