Datasheet

134
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
16.6.5 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Operation
The OSCULP32K provides a tunable, low-speed and ultra-low-power clock source. The OSCULP32K is factory-
calibrated under typical voltage and temperature conditions. The OSCULP32K should be preferred to the OSC32K
whenever the power requirements are prevalent over frequency stability and accuracy.
The OSCULP32K can be used as a source for the generic clock generators, as described in the “GCLK – Generic Clock
Controller” on page 79.
The OSCULP32K is enabled by default after a power-on reset (POR) and will always run except during POR. The
OSCULP32K has a 32.768kHz output and a 1.024kHz output that are always running.
The frequency of the OSCULP32K oscillator is controlled by the value in the 32kHz Ultra Low Power Internal Oscillator
Calibration bits (OSCULP32K.CALIB) in the 32kHz Ultra Low Power Internal Oscillator Control register.
OSCULP32K.CALIB is automatically loaded from Flash Factory Calibration during startup, and is used to compensate for
process variation, as described in the “Electrical Characteristics” on page 563. The calibration value can be overridden
by the user by writing to OSCULP32K.CALIB.
16.6.6 8MHz Internal Oscillator (OSC8M) Operation
OSC8M is an internal oscillator operating in open-loop mode and generating an 8MHz frequency. The OSC8M is factory-
calibrated under typical voltage and temperature conditions.
OSC8M is the default clock source that is used after a power-on reset (POR). The OSC8M can be used as a source for
the generic clock generators, as described in the “GCLK – Generic Clock Controller” on page 79, as well as function as
the backup clock if a main clock failure is detected.
In order to enable OSC8M, the Oscillator Enable bit in the OSC8M Control register (OSC8M.ENABLE) must be written to
one. OSC8M will not be enabled until OSC8M.ENABLE is set. In order to disable OSC8M, OSC8M.ENABLE must be
written to zero. OSC8M will not be disabled until OSC8M is cleared.
The frequency of the OSC8M oscillator is controlled by the value in the calibration bits (OSC8M.CALIB) in the OSC8M
Control register. CALIB is automatically loaded from Flash Factory Calibration during startup, and is used to compensate
for process variation, as described in the “Electrical Characteristics” on page 563.
The user can control the oscillation frequency by writing to the Frequency Range (FRANGE) and Calibration (CALIB) bit
groups in the 8MHz RC Oscillator Control register (OSC8M). It is not recommended to update the FRANGE and CALIB
bits when the OSC8M is enabled. As this is in open-loop mode, the frequency will be voltage, temperature and process
dependent. Refer to the “Electrical Characteristics” on page 563 for details.
OSC8M is automatically switched off in certain sleep modes to reduce power consumption, as described in the “PM –
Power Manager” on page 101.
16.6.7 Digital Frequency Locked Loop (DFLL48M) Operation
The DFLL48M can operate in both open-loop mode and closed-loop mode. In closed-loop mode, a low-frequency clock
with high accuracy can be used as the reference clock to get high accuracy on the output clock (CLK_DFLL48M).
The DFLL48M can be used as a source for the generic clock generators, as described in the “GCLK – Generic Clock
Controller” on page 79.
16.6.7.1 Basic Operation
Open-Loop Operation
After any reset, the open-loop mode is selected. When operating in open-loop mode, the output frequency of the
DFLL48M will be determined by the values written to the DFLL Coarse Value bit group and the DFLL Fine Value bit
group (DFLLVAL.COARSE and DFLLVAL.FINE) in the DFLL Value register.
It is possible to change the values of DFLLVAL.COARSE and DFLLVAL.FINE and thereby the output frequency of the
DFLL48M output clock, CLK_DFLL48M, while the DFLL48M is enabled and in use. CLK_DFLL48M is ready to be used
when PCLKSR.DFLLRDY is set after enabling the DFLL48M.