Datasheet

133
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
The XOSC32K can be used as a source for generic clock generators, as described in the “GCLK – Generic Clock
Controller” on page 79.
At power-on reset (POR) the XOSC32K is disabled, and the XIN32/XOUT32 pins can be used as General Purpose I/O
(GPIO) pins or by other peripherals in the system. When XOSC32K is enabled, the operating mode determines the GPIO
usage. When in crystal oscillator mode, XIN32 and XOUT32 are controlled by the SYSCTRL, and GPIO functions are
overridden on both pins. When in external clock mode, only the XIN32 pin will be overridden and controlled by the
SYSCTRL, while the XOUT32 pin can still be used as a GPIO pin.
The external clock or crystal oscillator is enabled by writing a one to the Enable bit (XOSC32K.ENABLE) in the 32kHz
External Crystal Oscillator Control register. To enable the XOSC32K as a crystal oscillator, a one must be written to the
XTAL Enable bit (XOSC32K.XTALEN). If XOSC32K.XTALEN is zero, external clock input will be enabled.
The oscillator is disabled by writing a zero to the Enable bit (XOSC32K.ENABLE) in the 32kHz External Crystal Oscillator
Control register while keeping the other bits unchanged. Writing to the XOSC32K.ENABLE bit while writing to other bits
may result in unpredictable behavior. The oscillator remains enabled in all sleep modes if it has been enabled
beforehand. The start-up time of the 32kHz External Crystal Oscillator is selected by writing to the Oscillator Start-Up
Time bit group (XOSC32K.STARTUP) in the in the 32kHz External Crystal Oscillator Control register. The SYSCTRL
masks the oscillator output during the start-up time to ensure that no unstable clock propagates to the digital logic. The
32kHz External Crystal Oscillator Ready bit (PCLKSR.XOSC32KRDY) in the Power and Clock Status register is set
when the user-selected startup time is over. An interrupt is generated on a zero-to-one transition of
PCLKSR.XOSC32KRDY if the 32kHz External Crystal Oscillator Ready bit (INTENSET.XOSC32KRDY) in the Interrupt
Enable Set Register is set.
As a crystal oscillator usually requires a very long start-up time (up to one second), the 32kHz External Crystal Oscillator
will keep running across resets, except for power-on reset (POR).
XOSC32K can provide two clock outputs when connected to a crystal. The XOSC32K has a 32.768kHz output enabled
by writing a one to the 32kHz External Crystal Oscillator 32kHz Output Enable bit (XOSC32K.EN32K) in the 32kHz
External Crystal Oscillator Control register. The XOSC32K also has a 1.024kHz clock output enabled by writing a one to
the 32kHz External Crystal Oscillator 1kHz Output Enable bit (XOSC32K.EN1K) in the External 32kHz Crystal Oscillator
Control register. XOSC32K.EN32K and XOSC32K.EN1K are only usable when XIN32 is connected to a crystal, and not
when an external digital clock is applied on XIN32.
Note: Do not enter standby mode when an oscillator is in startup:
Wait for the OSCxRDY bit in SYSCTRL.PCLKSR register to be set before going into standby mode.
16.6.4 32kHz Internal Oscillator (OSC32K) Operation
The OSC32K provides a tunable, low-speed and low-power clock source.
The OSC32K can be used as a source for the generic clock generators, as described in the “GCLK – Generic Clock
Controller” on page 79.
The OSC32K is disabled by default. The OSC32K is enabled by writing a one to the 32kHz Internal Oscillator Enable bit
(OSC32K.ENABLE) in the 32kHz Internal Oscillator Control register. It is disabled by writing a zero to OSC32K.ENABLE.
The OSC32K has a 32.768kHz output enabled by writing a one to the 32kHz Internal Oscillator 32kHz Output Enable bit
(OSC32K.EN32K). The OSC32K also has a 1.024kHz clock output enabled by writing a one to the 32kHz Internal
Oscillator 1kHz Output Enable bit (OSC32K.EN1K).
The frequency of the OSC32K oscillator is controlled by the value in the 32kHz Internal Oscillator Calibration bits
(OSC32K.CALIB) in the 32kHz Internal Oscillator Control register. The OSC32K.CALIB value must be written by the
user. Flash Factory Calibration values are stored in the NVM Software Calibration Area (refer to “NVM Software
Calibration Area Mapping” on page 23). When writing to the Calibration bits, the user must wait for the
PCLKSR.OSC32KRDY bit to go high before the value is committed to the oscillator.