Datasheet

Table Of Contents
11
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
5. I/O Multiplexing and Considerations
5.1 Multiplexed Signals
Each pin is by default controlled by the PORT as a general purpose I/O and alternatively it can be assigned to one of the
peripheral functions A, B, C, D, E, F, G or H. To enable a peripheral function on a pin, the Peripheral Multiplexer Enable
bit in the Pin Configuration register corresponding to that pin (PINCFGn.PMUXEN, n = 0-31) in the PORT must be written
to one. The selection of peripheral function A to H is done by writing to the Peripheral Multiplexing Odd and Even bits in
the Peripheral Multiplexing register (PMUXn.PMUXE/O) in the PORT. Refer to “PORT” on page 280 for details on how to
configure the I/O multiplexing.
Table 5-1 describes the peripheral signals multiplexed to the PORT I/O pins.
Table 5-1. PORT Function Multiplexing
Pin
I/O
Pin
Supply
Pin
Type
A B
(1)
C D E F G H
SAM
D20E
SAM
D20G
SAM
D20J
EIC REF ADC AC PTC DAC SERCOM
(2)
TC
(3)
AC/GCLK
1 1 1 PA00 VDDANA EXTINT[0]
SERCOM1/
PAD[0]
TC2/
WO[0]
2 2 2 PA01 VDDANA EXTINT[1]
SERCOM1/
PAD[1]
TC2/
WO[1]
3 3 3 PA02 VDDANA EXTINT[2] AIN[0] Y[0] VOUT
4 4 4 PA03 VDDANA EXTINT[3]
ADC/VREFA
DAC/VREFA
AIN[1] Y[1]
5 PB04 VDDANA EXTINT[4] AIN[12] Y[10]
6 PB05 VDDANA EXTINT[5] AIN[13] Y[11]
9 PB06 VDDANA EXTINT[6] AIN[14] Y[12]
10 PB07 VDDANA EXTINT[7] AIN[15] Y[13]
7 11 PB08 VDDANA EXTINT[8] AIN[2] Y[14]
SERCOM4/
PAD[0]
TC4/
WO[0]
8 12 PB09 VDDANA EXTINT[9] AIN[3] Y[15]
SERCOM4/
PAD[1]
TC4/
WO[1]
5 9 13 PA04 VDDANA EXTINT[4]
ADC/
VREFB
AIN[4] AIN[0] Y[2]
SERCOM0/
PAD[0]
TC0/
WO[0]
6 10 14 PA05 VDDANA EXTINT[5] AIN[5] AIN[1] Y[3]
SERCOM0/
PAD[1]
TC0/
WO[1]
7 11 15 PA06 VDDANA EXTINT[6] AIN[6] AIN[2] Y[4]
SERCOM0/
PAD[2]
TC1/
WO[0]
8 12 16 PA07 VDDANA EXTINT[7] AIN[7] AIN[3] Y[5]
SERCOM0/
PAD[3]
TC1/
WO[1]
11 13 17 PA08 VDDIO I
2
C NMI AIN[16] X[0]
SERCOM0/
PAD[0]
SERCOM2/
PAD[0]
TC0/
WO[0]
12 14 18 PA09 VDDIO I
2
C EXTINT[9] AIN[17] X[1]
SERCOM0/
PAD[1]
SERCOM2/
PAD[1]
TC0/
WO[1]
13 15 19 PA10 VDDIO EXTINT[10] AIN[18] X[2]
SERCOM0/
PAD[2]
SERCOM2/
PAD[2]
TC1/
WO[0]
GCLK_O[4]
14 16 20 PA11 VDDIO EXTINT[11] AIN[19] X[3]
SERCOM0/
PAD[3]
SERCOM2/
PAD[3]
TC1/
WO[1]
GCLK_IO[5]
19 23 PB10 VDDIO EXTINT[10]
SERCOM4/
PAD[2]
TC5/
WO[0]
GCLK_IO[4]
20 24 PB11 VDDIO EXTINT[11]
SERCOM4/
PAD[3]
TC5/
WO[1]
GCLK_IO[5]
25 PB12 VDDIO I
2
C EXTINT[12] X[12]
SERCOM4/
PAD[0]
TC4/
WO[0]
GCLK_IO[6]
26 PB13 VDDIO I
2
C EXTINT[13] X[13]
SERCOM4/
PAD[1]
TC4/
WO[1]
GCLK_IO[7]
27 PB14 VDDIO EXTINT[14] X[14]
SERCOM4/
PAD[2]
TC5/
WO[0]
GCLK_IO[0]