Datasheet

SAM4S Series [DATASHEET]

11100F–ATARM–29-Jan-14

• CES: Counter Event Selection

The bit CES defines when the channel counter event occurs when the period is center aligned (flag CHIDx in “PWM Interrupt Sta-

tus Register 1” ).

CALG = 0 (Left Alignment):

0/1: The channel counter event occurs at the end of the PWM period.

CALG = 1 (Center Alignment):

0: The channel counter event occurs at the end of the PWM period.

1: The channel counter event occurs at the end of the PWM period and at half the PWM period.

• DTE: Dead-Time Generator Enable

0: The dead-time generator is disabled.

1: The dead-time generator is enabled.

• DTHI: Dead-Time PWMHx Output Inverted

0: The dead-time PWMHx output is not inverted.

1: The dead-time PWMHx output is inverted.

• DTLI: Dead-Time PWMLx Output Inverted

0: The dead-time PWMLx output is not inverted.

1: The dead-time PWMLx output is inverted.