Datasheet

954
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
39.7.12 PWM Sync Channels Update Period Update Register
Name: PWM_SCUPUPD
Address: 0x40020030
Access: Write-only
This register acts as a double buffer for the UPR value. This prevents an unexpected automatic trigger of the update of synchro-
nous channels.
UPRUPD: Update Period Update
Defines the wanted time between each update of the synchronous channels if automatic trigger of the update is activated (UPDM
= 1 or UPDM = 2 in “PWM Sync Channels Mode Register” ). This time is equal to UPR+1 periods of the synchronous channels.
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
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76543210
–––– UPRUPD