Datasheet

799
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
36.8.8 USART Interrupt Disable Register (SPI_MODE)
Name: US_IDR (SPI_MODE)
Address: 0x4002400C (0), 0x4002800C (1)
Access: Write-only
This configuration is relevant only if USART_MODE = 0xE or 0xF in “USART Mode Register” on page 788.
The following configuration values are valid for all listed bit names of this register:
0: No effect
1: Disables the corresponding interrupt.
• RXRDY: RXRDY Interrupt Disable
• TXRDY: TXRDY Interrupt Disable
• OVRE: Overrun Error Interrupt Disable
• TXEMPTY: TXEMPTY Interrupt Disable
• UNRE: SPI Underrun Error Interrupt Disable
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
– – – RXBUFF TXBUFE UNRE TXEMPTY –
76543210
– – OVRE ENDTX ENDRX – TXRDY RXRDY