Datasheet

354
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
 When the GPNVM bit is set, the bit FRDY in EEFC_FSR rises. If an interrupt was enabled by setting the FRDY bit
in EEFC_FMR, the interrupt line of the interrupt controller is activated.
 The result of the SGPB command can be checked by running a Get GPNVM bit (GGPB) command.
Note: The value of the FARG argument passed together with SGPB command must not exceed the higher GPNVM
index available in the product. Flash data content is not altered if FARG exceeds the limit. Command Error is
detected only if FARG is greater than 8.
Two errors can be detected in EEFC_FSR after a programming sequence:
 Command Error: a bad keyword has been written in EEFC_FCR.
 Flash Error: at the end of the programming, the EraseVerify or WriteVerify test of the Flash memory has failed.
It is possible to clear GPNVM bits previously set. The Clear GPNVM bit sequence is:
 Start the Clear GPNVM bit command (CGPB) by writing EEFC_FCR with CGPB and the number of the GPNVM
bits to be cleared.
 When the clear completes, the FRDY bit in EEFC_FSR rises. If an interrupt has been enabled by setting the FRDY
bit in EEFC_FMR, the interrupt line of the interrupt controller is activated.
Note: The value of the FARG argument passed together with CGPB command must not exceed the higher GPNVM
index available in the product. Flash data content is not altered if FARG exceeds the limit. Command Error is
detected only if FARG is greater than 8.
Two errors can be detected in EEFC_FSR after a programming sequence:
 Command Error: a bad keyword has been written in EEFC_FCR.
 Flash Error: at the end of the programming, the EraseVerify or WriteVerify test of the Flash memory has failed.
The status of GPNVM bits can be returned by the EEFC. The sequence is:
 Start the Get GPNVM bit command by writing EEFC_FCR with GGPB. The FARG field is meaningless.
 GPNVM bits can be read by the software application in EEFC_FRR. The first word read corresponds to the 32 first
GPNVM bits, following reads provide the next 32 GPNVM bits as long as it is meaningful. Extra reads to
EEFC_FRR return 0.
For example, if the third bit of the first word read in EEFC_FRR is set, then the third GPNVM bit is active.
One error can be detected in EEFC_FSR after a programming sequence:
 Command Error: a bad keyword has been written in EEFC_FCR.
Note: Access to the Flash in read is permitted when a set, clear or get GPNVM bit command is performed.
20.4.3.6 Calibration Bit
Calibration bits do not interfere with the embedded Flash memory plane.
The calibration bits cannot be modified.
The status of calibration bits are returned by the EEFC. The sequence is:
 Issue the Get CALIB bit command by writing EEFC_FCR with GCALB (see Table 20-2). The FARG field is
meaningless.
 Calibration bits can be read by the software application in EEFC_FRR. The first word read corresponds to the first
32 calibration bits. The following reads provide the next 32 calibration bits as long as it is meaningful. Extra reads
to EEFC_FRR return 0.
The 4/8/12 MHz Fast RC oscillator is calibrated in production. This calibration can be read through the Get CALIB bit
command. The table below shows the bit implementation for each frequency:
Table 20-5. Calibration Bit Indexes
RC Calibration Frequency EEFC_FRR Bits
8 MHz output [28 - 22]
12 MHz output [38 - 32]