Datasheet

308
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
17. Watchdog Timer (WDT)
17.1 Description
The Watchdog Timer (WDT) can be used to prevent system lock-up if the software becomes trapped in a deadlock. It
features a 12-bit down counter that allows a watchdog period of up to 16 seconds (slow clock around 32 kHz). It can
generate a general reset or a processor reset only. In addition, it can be stopped while the processor is in debug mode or
idle mode.
17.2 Embedded Characteristics
 12-bit key-protected programmable counter
 Watchdog Clock is independent from Processor Clock
 Provides reset or interrupt signals to the system
 Counter may be stopped while the processor is in debug state or in idle mode