Datasheet

261
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
Figure 13-3. Application Test Environment Example
13.4 Debug and Test Pin Description
Chip 2
Chip n
Chip 1 SAM4
SAM4-based Application Board In Test
JTAG
Connector
Tester
Test Adaptor
JTAG
Probe
Table 13-1. Debug and Test Signal List
Signal Name Function Type Active Level
Reset/Test
NRST Microcontroller Reset Input/Output Low
TST Test Select Input
SWD/JTAG
TCK/SWCLK Test Clock/Serial Wire Clock Input
TDI Test Data In Input
TDO/TRACESWO
Test Data Out/Trace
Asynchronous Data Out
Output
TMS/SWDIO
Test Mode Select/Serial Wire
Input/Output
Input
JTAGSEL JTAG Selection Input High