Datasheet

1192
SAM4S Series [DATASHEET]
11100F–ATARM–22-Nov-13
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Table 48-5. SAM4S Datasheet Rev. 11100B 31-Jul-12 Revision History
Doc. Rev.
11100B Comments
Change
Request
Ref.
Introduction
48 pins packages (SAM4S16A and SAM4S8A devices) removed.
Write Protected Registers added in “Description” on page 1.
Note related to EWP and EWPL commands added in Section 8.1.3.1 “Flash Overview” on page 36.
References to WFE instructions replaced by relevant bits precise descriptions.
Dual bank and cache memory mentioned in “Description” on page 1 and “Configuration Summary” on page 4.
Flash and SRAM memory sizes updated in “Description” on page 1 and “Configuration Summary” on page 4.
1 µA instead of 3 in “Description” on page 1, Section 5.2 on page 26 and Section 5.5.1 on page 28.
Table titles and sub-section titles updated with new devices.
New block diagram added in Figure 2-2 on page 6.
VFBGA100 package added: Figure 4-3 on page 17 and Table 4-3 on page 20 added.
Reference to CortexM3 deleted and VDDIO value added in Section 5.5.1 “Backup Mode” on page 28.
Entering Wait Mode process updated and current changed from 15 to 32 µA in Section 5.5.2 on page 28.
Added paragraph detailing mode selection with FLPM value in Section 5.5.3 on page 29.
Values added and notes updated in Table 5-1 on page 30.
Third paragraph frequency values updated in Section 6.1 on page 31.
SRAM upper address changed to 0x20400000, and EFC1 added in Figure 7-1 on page 35.
Note added in Section 8.1.3.1 “Flash Overview” on page 36.
New devices features added in Section 8.1.1 “Internal SRAM” on page 36, Section 8.1.3.1 “Flash Overview” on
page 36, Section 8.1.3.4 “Lock Regions” on page 39, Section 8.1.3.5 “Security Bit Feature” on page 40, Section
8.1.3.11 “GPNVM Bits” on page 41.
EEFC replaced by EEFC0 and EEFC1 in Table 11-1 on page 45.
‘Cortex M-4’ changed for ‘Cortex-M4’ in block diagrams: Figure 2-3 on page 7 and Figure 2-4 on page 8.
Section 5.5.4 “Low-power Mode Summary Table”, updated the list of potential wake up sources for Sleep Mode
in Table 5-1 on page 30.
Added references to S16 in the flash size description in Section 8.1.3.1 “Flash Overview”.
Section 2. “Block Diagram”, replaced “Time Counter B” by “Time Counter A” in Figure 2-3 on page 7.
Fixed the section structure for Section 5.5.3 “Sleep Mode”.
8100
8213
8225
8275
rfo
rfo
rfo
rfo
rfo
rfo
CORTEX
FPU related instructions deleted in
Table 12-13 on page 79.
Font
s style corrected for
instructions code in the whole chapter.
Updated Figure 12-9 on page 88.
8252
rfo
rfo
RSTC
Updated for dual core.
EXTRST field description updated in Section 14.5.1 “Reset Controller Control Register” on page 250.
8306
8340