Datasheet

1110
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
44.4.2 Sleep and Wait Mode Current Consumption
The wait mode and sleep mode configuration and measurements are defined below.
Figure 44-5. Measurement Setup for Sleep Mode
44.4.2.1 Sleep Mode
 Core clock off
 VDDIO=VDDIN=3.3V
 Master clock (MCK) running at various frequencies with PLLA or the fast RC oscillator
 Fast start-up through WKUP0–15 pins
 Current measurement as shown in Figure 44-5
 All peripheral clocks deactivated
 Temperature = 25°C
Table 44-14 shows the current consumption in typical conditions.
VDDIO
VDDOUT
VDDCORE
VDDIN
Voltage
Regulator
VDDPLL
3.3V
AMP1
AMP2