Datasheet

1056
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
42.7.2 ADC Mode Register
Name: ADC_MR
Address: 0x40038004
Access: Read/Write
This register can only be written if the WPEN bit is cleared in the ADC Write Protection Mode Register.
• TRGEN: Trigger Enable
• TRGSEL: Trigger Selection
• SLEEP: Sleep Mode
31 30 29 28 27 26 25 24
USEQ – TRANSFER TRACKTIM
23 22 21 20 19 18 17 16
ANACH – SETTLING STARTUP
15 14 13 12 11 10 9 8
PRESCAL
76543210
FREERUN FWUP SLEEP
– TRGSEL TRGEN
Value Name Description
0 DIS Hardware triggers are disabled. Starting a conversion is only possible by software.
1 EN Hardware trigger selected by TRGSEL field is enabled.
Value Name Description
0 ADC_TRIG0 External trigger
1 ADC_TRIG1 TIO Output of the Timer Counter Channel 0
2 ADC_TRIG2 TIO Output of the Timer Counter Channel 1
3 ADC_TRIG3 TIO Output of the Timer Counter Channel 2
4 ADC_TRIG4 PWM Event Line 0
5 ADC_TRIG5 PWM Event Line 1
6 ADC_TRIG6 Reserved
7–Reserved
Value Name Description
0 NORMAL Normal Mode: The ADC Core and reference voltage circuitry are kept ON between conversions
1 SLEEP Sleep Mode: The wake-up time can be modified by programming FWUP bit