Datasheet

1151
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
44.12.6 SMC Timings
Timings are given in the following domain:
 1.8V domain: VDDIO from 1.65V to 1.95V, maximum external capacitor = 30 pF
 3.3V domain: VDDIO from 2.85V to 3.6V, maximum external capacitor = 50 pF.
Timings are given assuming a capacitance load on data, control and address pads:
In the following tables t
CPMCK
is MCK period. Timing extraction
44.12.6.1 Read Timings
Table 44-64. SMC Read Signals - NRD Controlled (READ_MODE = 1)
Symbol Parameter Min Max Units
VDDIO Supply 1.8V
(2)
3.3V
(3)
1.8V
(2)
3.3V
(3)
NO HOLD Settings (NRD Hold = 0)
SMC
1
Data Setup before NRD High 24.5 21.3 — — ns
SMC
2
Data Hold after NRD High 0 0 — — ns
HOLD Settings (NRD Hold ≠ 0)
SMC
3
Data Setup before NRD High 19.5 14.0 ——ns
SMC
4
Data Hold after NRD High 00——ns
HOLD or NO HOLD Settings (NRD Hold ≠ 0, NRD Hold = 0)
SMC
5
A0 - A22 Valid before NRD High
(NRD setup +
NRD pulse) *
t
CPMCK
- 6.5
(NRD setup +
NRD pulse)*
t
CPMCK
- 6.3
——
ns
SMC
6
NCS Low before NRD High
(NRD setup +
NRD pulse -
NCS rd setup)
* t
CPMCK
- 4.5
(NRD setup +
NRD pulse -
NCS rd setup)
* t
CPMCK
- 5.1
——
ns
SMC
7
NRD Pulse Width
NRD pulse *
t
CPMCK
- 7.2
NRD pulse *
t
CPMCK
- 6.2
——
ns