Datasheet

80
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
All faults exceptions except for hard fault have configurable exception priority, see “System Handler Priority Registers” .
The software can disable the execution of the handlers for these faults, see “System Handler Control and State Register”
.
Usually, the exception priority, together with the values of the exception mask registers, determines whether the
processor enters the fault handler, and whether a fault handler can preempt another fault handler, as described in
“Exception Model” .
In some situations, a fault with configurable priority is treated as a hard fault. This is called priority escalation, and the
fault is described as escalated to hard fault. Escalation to hard fault occurs when:
 A fault handler causes the same kind of fault as the one it is servicing. This escalation to hard fault occurs because
a fault handler cannot preempt itself; it must have the same priority as the current priority level.
 A fault handler causes a fault with the same or lower priority as the fault it is servicing. This is because the handler
for the new fault cannot preempt the currently executing fault handler.
 An exception handler causes a fault for which the priority is the same as or lower than the currently executing
exception.
 A fault occurs and the handler for that fault is not enabled.
If a bus fault occurs during a stack push when entering a bus fault handler, the bus fault does not escalate to a hard fault.
This means that if a corrupted stack causes a fault, the fault handler executes even though the stack push for the handler
failed. The fault handler operates but the stack contents are corrupted.
Note: Only Reset and NMI can preempt the fixed priority hard fault. A hard fault can preempt any exception other than
Reset, NMI, or another hard fault.
Fault Status Registers and Fault Address Registers
The fault status registers indicate the cause of a fault. For bus faults and memory management faults, the fault address
register indicates the address accessed by the operation that caused the fault, as shown in Table 12-12.
Lockup
The processor enters a lockup state if a hard fault occurs when executing the NMI or hard fault handlers. When the
processor is in lockup state, it does not execute any instructions. The processor remains in lockup state until either:
 It is reset
 An NMI occurs
 It is halted by a debugger.
Note: If the lockup state occurs from the NMI handler, a subsequent NMI does not cause the processor to leave the
lockup state.
Table 12-12. Fault Status and Fault Address Registers
Handler
Status Register
Name
Address Register
Name Register Description
Hard fault SCB_HFSR – “Hard Fault Status Register”
Memory
management fault
MMFSR SCB_MMFAR
“MMFSR: Memory Management Fault Status Subregister”
“MemManage Fault Address Register”
Bus fault BFSR SCB_BFAR
“BFSR: Bus Fault Status Subregister”
“Bus Fault Address Register”
Usage fault UFSR – “UFSR: Usage Fault Status Subregister”