Datasheet

653
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
33.2 Embedded Characteristics
 Communication with Serial External Devices Supported
 Master mode can drive SPCK up to peripheral clock
 Slave mode operates on SPCK, asynchronously with core and bus clock
 Four chip selects with external decoder support allow communication with up to 15peripherals
 Serial memories, such as DataFlash and 3-wire EEPROMs
 Serial peripherals, such as ADCs, DACs, LCD controllers, CAN controllers and sensors
 External coprocessors
 Master or Slave Serial Peripheral Bus Interface
 8-bit to 16-bit programmable data length per chip select
 Programmable phase and polarity per chip select
 Programmable transfer delay between consecutive transfers and delay before SPI clock per chip select
 Programmable delay between chip selects
 Selectable mode fault detection
 Connection to PDC Channel Capabilities, Optimizing Data Transfers
 One channel for the receiver
 One channel for the transmitter