Datasheet

932
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
Figure 39-13. Method 3 (UPDM=2 and PTRM=1 and PTRCS=0)
39.6.3 PWM Comparison Units
The PWM provides 8 independent comparison units able to compare a programmed value with the current value of the
channel 0 counter (which is the channel counter of all synchronous channels, Section 39.6.2.7 “Synchronous Channels”).
These comparisons are intended to generate pulses on the event lines (used to synchronize ADC, see Section 39.6.4
“PWM Event Lines”), to generate software interrupts and to trigger PDC transfer requests for the synchronous channels
(see “Method 3: Automatic write of duty-cycle values and automatic trigger of the update” on page 930).
Figure 39-14. Comparison Unit Block Diagram
The comparison x matches when it is enabled by the bit CEN in the “PWM Comparison x Mode Register”
(PWM_CMPMx for the comparison x) and when the counter of the channel 0 reaches the comparison value defined by
the field CV in “PWM Comparison x Value Register” (PWM_CMPVx for the comparison x). If the counter of the channel
0 is center aligned (CALG = 1 in “PWM Channel Mode Register” ), the bit CVM (in PWM_CMPVx) defines if the
CCNT0
CDTYUPD
0x20
0x40
0x60
UPRCNT
0x0
0x1
0x0
0x1
0x0
0x1
CDTY
UPRUPD 0x1
0x3
CMP0 match
transfer request
WRDY
0x0
0x1
0x2
0x3
0x0
0x1
0x2
UPR
0x1
0x3
0x80
0xA0
0xB0
0x20
0x40
0x60
0x80
0xA0
=
fault on channel 0
CNT [PWM_CCNT0]
CNT [PWM_CCNT0] is decrementing
CALG [PWM_CMR0]
CV [PWM_CMPVx]
=
1
0
1
Comparison x
CVM [PWM_CMPVx]
=
CPRCNT [PWM_CMPMx]
CTR [PWM_CMPMx]
CEN [PWM_CMPM]x