Datasheet

861
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
Quadrature decoding (direction change) can be disabled using QDTRANS bit.
One of the POSEN or SPEEDEN bits must be also enabled.
• POSEN: POSition ENabled
0: Disable position.
1: Enables the position measure on channel 0 and 1.
• SPEEDEN: SPEED ENabled
0: Disabled.
1: Enables the speed measure on channel 0, the time base being provided by channel 2.
• QDTRANS: Quadrature Decoding TRANSparent
0: Full quadrature decoding logic is active (direction change detected).
1: Quadrature decoding logic is inactive (direction change inactive) but input filtering and edge detection are performed.
• EDGPHA: EDGe on PHA count mode
0: Edges are detected on PHA only.
1: Edges are detected on both PHA and PHB.
• INVA: INVerted phA
0: PHA (TIOA0) is directly driving quadrature decoder logic.
1: PHA is inverted before driving quadrature decoder logic.
• INVB: INVerted phB
0: PHB (TIOB0) is directly driving quadrature decoder logic.
1: PHB is inverted before driving quadrature decoder logic.
• SWAP: SWAP PHA and PHB
0: No swap between PHA and PHB.
1: Swap PHA and PHB internally, prior to driving quadrature decoder logic.
• INVIDX: INVerted InDeX
0: IDX (TIOA1) is directly driving quadrature logic.
1: IDX is inverted before driving quadrature logic.
• IDXPHB: InDeX pin is PHB pin
0: IDX pin of the rotary sensor must drive TIOA1.
1: IDX pin of the rotary sensor must drive TIOB0.
• FILTER: Glitch Filter
0: IDX,PHA, PHB input pins are not filtered.
1: IDX,PHA, PHB input pins are filtered using MAXFILT value.
• MAXFILT: MAXimum FILTer
1.. 63: Defines the filtering capabilities.
Pulses with a period shorter than MAXFILT+1 MCK clock cycles are discarded.