Datasheet

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SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
Reset
Reset is invoked on power up or a warm reset. The exception model treats reset as a special form of exception. When
reset is asserted, the operation of the processor stops, potentially at any point in an instruction. When reset is
deasserted, execution restarts from the address provided by the reset entry in the vector table. Execution restarts as
privileged execution in Thread mode.
Non Maskable Interrupt (NMI)
A non maskable interrupt (NMI) can be signalled by a peripheral or triggered by software. This is the highest priority
exception other than reset. It is permanently enabled and has a fixed priority of -2.
NMIs cannot be:
 Masked or prevented from activation by any other exception.
 Preempted by any exception other than Reset.
Hard Fault
A hard fault is an exception that occurs because of an error during exception processing, or because an exception
cannot be managed by any other exception mechanism. Hard Faults have a fixed priority of -1, meaning they have higher
priority than any exception with configurable priority.
Memory Management Fault (MemManage)
A Memory Management Fault is an exception that occurs because of a memory protection related fault. The MPU or the
fixed memory protection constraints determines this fault, for both instruction and data memory transactions. This fault is
used to abort instruction accesses to Execute Never (XN) memory regions, even if the MPU is disabled.
Bus Fault
A Bus Fault is an exception that occurs because of a memory related fault for an instruction or data memory transaction.
This might be from an error detected on a bus in the memory system.
Usage Fault
A Usage Fault is an exception that occurs because of a fault related to an instruction execution. This includes:
 An undefined instruction
 An illegal unaligned access
 An invalid state on instruction execution
 An error on exception return.
The following can cause a Usage Fault when the core is configured to report them:
 An unaligned address on word and halfword memory access
 A division by zero.
SVCall
A supervisor call (SVC) is an exception that is triggered by the SVC instruction. In an OS environment, applications can
use SVC instructions to access OS kernel functions and device drivers.
PendSV
PendSV is an interrupt-driven request for system-level service. In an OS environment, use PendSV for context switching
when no other exception is active.
SysTick
A SysTick exception is an exception the system timer generates when it reaches zero. Software can also generate a
SysTick exception. In an OS environment, the processor can use this exception as system tick.
Interrupt (IRQ)
A interrupt, or IRQ, is an exception signalled by a peripheral, or generated by a software request. All interrupts are
asynchronous to instruction execution. In the system, peripherals use interrupts to communicate with the processor.