Datasheet

406
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
23.7.10 CRCCU Mode Register
Name: CRCCU_MR
Access: Read Write
Reset: 0x00000000
• ENABLE: CRC Enable
• COMPARE: CRC Compare
If set to one, this bit indicates that the CRCCU DMA will compare the CRC computed on the data stream with the value stored in
the TR_CRC reference register. If a mismatch occurs, the ERRISR bit in the CRCCU_ISR is set.
• PTYPE: Primitive Polynomial
• DIVIDER: Request Divider
CRCCU DMA performs successive transfers. It is possible to reduce the bandwidth drained by the CRCCU DMA by programming
the DIVIDER field. The transfer request frequency is divided by 2^(DIVIDER+1).
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
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76543210
DIVIDER PTYPE COMPARE ENABLE
Value Name Description
0 CCITT8023 Polynom 0x04C11DB7
1 CASTAGNOLI Polynom 0x1EDC6F41
2 CCITT16 Polynom 0x1021