Datasheet

356
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
When programming is completed, the FRDY bit in EEFC_FSR rises. If an interrupt has been enabled by setting
the FRDY bit in EEFC_FMR, the corresponding interrupt line of the interrupt controller is activated.
Two errors can be detected in EEFC_FSR after this sequence:
Command Error: a bad keyword has been written in EEFC_FCR.
Flash Error: at the end of the programming, the EraseVerify test of the Flash memory has failed.