Datasheet

323
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
If BODRSTEN is set and the voltage regulation is lost (output voltage of the regulator too low), the vddcore_nreset signal
is asserted for a minimum of 1 slow clock cycle and then released if bodcore_in has been reactivated. The BODRSTS bit
is set in SUPC_SR so that the user can know the source of the last reset.
Until bodcore_in is deactivated, the vddcore_nreset signal remains active.
18.3.7 Wake-up Sources
The wake-up events allow the device to exit backup mode. When a wake-up event is detected, the Supply Controller
performs a sequence which automatically reenables the core power supply.
Figure 18-4. Wake-up Sources
18.3.7.1 Wake-up Inputs
The wake-up inputs, WKUPx, can be programmed to perform a wake-up of the core power supply. Each input can be
enabled by writing to 1 the corresponding bit, WKUPENx, in the Wake-up Inputs register (SUPC_WUIR). The wake-up
level can be selected with the corresponding polarity bit, WKUPTx, also located in SUPC_WUIR.
All the resulting signals are wired-ORed to trigger a debounce counter, which is programmed with the WKUPDBC field in
SUPC_WUMR. The WKUPDBC field selects a debouncing period of 3, 32, 512, 4,096 or 32,768 slow clock cycles. This
corresponds respectively to about 100 µs, about 1 ms, about 16 ms, about 128 ms and about 1 second (for a typical slow
clock frequency of 32 kHz). Programming WKUPDBC to 0x0 selects an immediate wake-up, i.e., an enabled WKUP pin
must be active according to its polarity during a minimum of one slow clock period to wake up the core power supply.
If an enabled WKUP pin is asserted for a time longer than the debouncing period, a wake-up of the core power supply is
started and the signals, WKUP0 to WKUP15 as shown in Figure 18-4 "Wake-up Sources", are latched in SUPC_SR. This
WKUP15
WKUPEN15
WKUPT15
WKUPEN1
WKUPEN0
Debouncer
SLCK
WKUPDBC
WKUPS
RTCEN
rtc_alarm
SMEN
sm_out
Core
Supply
Restart
WKUPIS0
WKUPIS1
WKUPIS15
WKUPT0
WKUPT1
WKUP0
WKUP1
RTTEN
rtt_alarm
Debouncer
RTCOUT0
LPDBC
Debouncer
LPDBC
RTCOUT0
LPDBCS0
LPDBCS1
LPDBCEN1
Low/High
Level Detect
WKUPT1
LPDBCEN0
Low/High
Level Detect
WKUPT0
Low/High
Level Detect
Low/High
Level Detect
Low/High
Level Detect
Low-power
Tamper Detection
Logic