Datasheet

235
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
12.11.1.5 Subregions
Regions of 256 bytes or more are divided into eight equal-sized subregions. Set the corresponding bit in the SRD field of
the MPU_RASR field to disable a subregion. See “MPU Region Attribute and Size Register” . The least significant bit of
SRD controls the first subregion, and the most significant bit controls the last subregion. Disabling a subregion means
another region overlapping the disabled range matches instead. If no other enabled region overlaps the disabled
subregion, the MPU issues a fault.
Regions of 32, 64, and 128 bytes do not support subregions. With regions of these sizes, the SRD field must be set to
0x00, otherwise the MPU behavior is unpredictable.
12.11.1.6 Example of SRD Use
Two regions with the same base address overlap. Region 1 is 128 KB, and region 2 is 512 KB. To ensure the attributes
from region 1 apply to the first 128 KB region, set the SRD field for region 2 to b00000011 to disable the first two
subregions, as in Figure 12-13 below:
Figure 12-13. SRD Use
12.11.1.7 MPU Design Hints And Tips
To avoid unexpected behavior, disable the interrupts before updating the attributes of a region that the interrupt handlers
might access.
Ensure the software uses aligned accesses of the correct size to access MPU registers:
 Except for the MPU_RASR, it must use aligned word accesses
 For the MPU_RASR, it can use byte or aligned halfword or word accesses.
The processor does not support unaligned accesses to MPU registers.
When setting up the MPU, and if the MPU has previously been programmed, disable unused regions to prevent any
previous region settings from affecting the new MPU setup.
MPU Configuration for a Microcontroller
Usually, a microcontroller system has only a single processor and no caches. In such a system, program the MPU as
follows:
In most microcontroller implementations, the shareability and cache policy attributes do not affect the system behavior.
However, using these settings for the MPU regions can make the application code more portable. The values given are
Region 1
Disabled subregion
Disabled subregion
Region 2, with
subregions
Base address of both regions
Offset from
base address
0
64KB
128KB
192KB
256KB
320KB
384KB
448KB
512KB
Table 12-39. Memory Region Attributes for a Microcontroller
Memory Region TEX C B S Memory Type and Attributes
Flash memory b000 1 0 0 Normal memory, non-shareable, write-through
Internal SRAM b000 1 0 1 Normal memory, shareable, write-through
External SRAM b000 1 1 1 Normal memory, shareable, write-back, write-allocate
Peripherals b000 0 1 1 Device memory, shareable