Datasheet

116
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
 These instructions update the N and Z flags according to the result
 The C flag is updated to the last bit shifted out, except when the shift length is 0, see “Shift Operations” .
Examples
ASR R7, R8, #9 ; Arithmetic shift right by 9 bits
SLS R1, R2, #3 ; Logical shift left by 3 bits with flag update
LSR R4, R5, #6 ; Logical shift right by 6 bits
ROR R4, R5, R6 ; Rotate right by the value in the bottom byte of R6
RRX R4, R5 ; Rotate right with extend.
12.6.5.4 CLZ
Count Leading Zeros.
Syntax
CLZ{cond} Rd, Rm
where:
cond is an optional condition code, see “Conditional Execution” .
Rd is the destination register.
Rm is the operand register.
Operation
The CLZ instruction counts the number of leading zeros in the value in Rm and returns the result in Rd. The result value
is 32 if no bits are set and zero if bit[31] is set.
Restrictions
Do not use SP and do not use PC.
Condition Flags
This instruction does not change the flags.
Examples
CLZ R4,R9
CLZNE R2,R3