Datasheet
763
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
Figure 36-21. Receiver Status 
36.7.3.8 Parity
The USART supports five parity modes that are selected by writing to the PAR field in the US_MR. The PAR field also 
enables the multidrop mode, see “Multidrop Mode” on page 764. Even and odd parity bit generation and error detection 
are supported. 
If even parity is selected, the parity generator of the transmitter drives the parity bit to 0 if a number of 1s in the character 
data bit is even, and to 1 if the number of 1s is odd. Accordingly, the receiver parity checker counts the number of 
received 1s and reports a parity error if the sampled parity bit does not correspond. If odd parity is selected, the parity 
generator of the transmitter drives the parity bit to 1 if a number of 1s in the character data bit is even, and to 0 if the 
number of 1s is odd. Accordingly, the receiver parity checker counts the number of received 1s and reports a parity error 
if the sampled parity bit does not correspond. If the mark parity is used, the parity generator of the transmitter drives the 
parity bit to 1 for all characters. The receiver parity checker reports an error if the parity bit is sampled to 0. If the space 
parity is used, the parity generator of the transmitter drives the parity bit to 0 for all characters. The receiver parity 
checker reports an error if the parity bit is sampled to 1. If parity is disabled, the transmitter does not generate any parity 
bit and the receiver does not report any parity error.
Table 36-9 shows an example of the parity bit for the character 0x41 (character ASCII “A”) depending on the 
configuration of the USART. Because there are two bits to 1, 1 bit is added when a parity is odd, or 0 is added when a 
parity is even.
When the receiver detects a parity error, it sets the PARE (Parity Error) bit in the US_CSR. The PARE bit can be cleared 
by writing the US_CR with the RSTSTA bit to 1. Figure 36-22 illustrates the parity bit status setting and clearing.
D0 D1 D2 D3 D4 D5 D6 D7
RXD
Start 
Bit
Parity
Bit
Stop
Bit
Baud Rate
 Clock
Write
US_CR
RXRDY
OVRE
D0 D1 D2 D3 D4 D5 D6 D7
Start 
Bit
Parity
Bit
Stop
Bit
RSTSTA = 1
Read
US_RHR
Table 36-9. Parity Bit Examples
Character Hexadecimal Binary Parity Bit Parity Mode
A 0x41 0100 0001 1 Odd
A 0x41 0100 0001 0 Even
A 0x41 0100 0001 1 Mark
A 0x41 0100 0001 0 Space
A 0x41 0100 0001 None None










