Datasheet

975

SAM4S Series [DATASHEET]

11100F–ATARM–29-Jan-14

39.7.32 PWM Comparison x Value Register

Name: PWM_CMPVx

Address: 0x40020130 [0], 0x40020140 [1], 0x40020150 [2], 0x40020160 [3], 0x40020170 [4], 0x40020180 [5], 0x40020190

[6], 0x400201A0 [7]

Access: Read/Write

Only the first 16 bits (channel counter size) of field CV are significant.

• CV: Comparison x Value

Define the comparison x value to be compared with the counter of the channel 0.

• CVM: Comparison x Value Mode

0: The comparison x between the counter of the channel 0 and the comparison x value is performed when this counter is

incrementing.

1: The comparison x between the counter of the channel 0 and the comparison x value is performed when this counter is

decrementing.

Note: This bit is useless if the counter of the channel 0 is left aligned (CALG = 0 in “PWM Channel Mode Register” on page

979)

31 30 29 28 27 26 25 24

–––––––CVM

23 22 21 20 19 18 17 16

15 14 13 12 11 10 9 8

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