Datasheet

51
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
12.2 Embedded Characteristics
 Tight integration of system peripherals reduces area and development costs
 Thumb instruction set combines high code density with 32-bit performance
 Code-patch ability for ROM system updates
 Power control optimization of system components
 Integrated sleep modes for low power consumption
 Fast code execution permits slower processor clock or increases sleep mode time
 Hardware division and fast digital-signal-processing oriented multiply accumulate
 Saturating arithmetic for signal processing
 Deterministic, high-performance interrupt handling for time-critical applications
 Memory Protection Unit (MPU) for safety-critical applications
 Extensive debug and trace capabilities:
 Serial Wire Debug and Serial Wire Trace reduce the number of pins required for debugging, tracing, and
code profiling.
12.3 Block Diagram
Figure 12-1. Typical Cortex-M4 Implementation
NVIC
Debug
Access
Port
Memory
Protection Unit
Serial
Wire
Viewer
Bus Matrix
Code
Interface
SRAM and
Peripheral Interface
Data
Watchpoints
Flash
Patch
Cortex-M4
Processor
Processor
Core