Datasheet

330
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
18.4.4 Supply Controller Supply Monitor Mode Register
Name: SUPC_SMMR
Address: 0x400E1414
Access: Read/Write
This register is located in the VDDIO domain.
This register can only be written if the WPEN bit is cleared in the System Controller Write Protection Mode Register (SYSC_MR).
 SMTH: Supply Monitor Threshold
Selects the threshold voltage of the supply monitor. Refer to the electrical characteristics for voltage values.
 SMSMPL: Supply Monitor Sampling Period
 SMRSTEN: Supply Monitor Reset Enable
0 (NOT_ENABLE): The core reset signal “vddcore_nreset” is not affected when a supply monitor detection occurs.
1 (ENABLE): The core reset signal, vddcore_nreset is asserted when a supply monitor detection occurs.
 SMIEN: Supply Monitor Interrupt Enable
0 (NOT_ENABLE): The SUPC interrupt signal is not affected when a supply monitor detection occurs.
1 (ENABLE): The SUPC interrupt signal is asserted when a supply monitor detection occurs.
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
– – SMIEN SMRSTEN – SMSMPL
76543210
–––– SMTH
Value Name Description
0x0 SMD Supply Monitor disabled
0x1 CSM Continuous Supply Monitor
0x2 32SLCK Supply Monitor enabled one SLCK period every 32 SLCK periods
0x3 256SLCK Supply Monitor enabled one SLCK period every 256 SLCK periods
0x4 2048SLCK Supply Monitor enabled one SLCK period every 2,048 SLCK periods