Datasheet

1182
SAM4S Series [DATASHEET]
11100F–ATARM–22-Nov-13
Section 16. “Real-time Clock (RTC)”
Section 16. “Real-time Clock (RTC)”: updated to explain need for accurate external 32.768 kHz clock
Section 16.2 “Embedded Characteristics”: added feature “Write-Protected Registers”
Section 16.5.6 “Updating Time/Calendar”: reworded second paragraph for clarity
Section 16.5.7 “RTC Accurate Clock Calibration”: replaced sentence “The period interval between 2 correction
events is programmable in order to cover the possible crystal oscillator clock variations” with “According to the
CORRECTION, NEGPPM and HIGHPPM values configured in the RTC Mode Register (RTC_MR), the period
interval between two correction events differs”
Section 16.6.1 “RTC Control Register”, Section 16.6.2 “RTC Mode Register”, Section 16.6.5 “RTC Time Alarm
Register”, Section 16.6.6 “RTC Calendar Alarm Register”: added sentence “This register can only be written if the
WPEN bit is cleared in the System Controller Write Protection Mode Register (SYSC_WPMR)” and updated
description of UPDCAL bit
Section 16.6.2 “RTC Mode Register”: corrected typo (THIGH value 2 description now reads “3.91 ms”)
Section 18. “Supply Controller (SUPC)”
Section 18.1 “Embedded Characteristics”: added bullets on tamper detection and on anti-tampering.
Figure 18-1 Supply Controller Block Diagram modified.
Section 18.3.4 “Supply Monitor”: Supply Monitor sampling mode, power reduction factor: replaced incorrect
values of 32, 256 or 2048 by the correct values of 2, 16 and 128.
Section 18.3.6.2 “Brownout Detector Reset”: Reworked 1st paragraph for clarity
Section 18.3.7.1 “Wake-up Inputs”: corrected WKUPPLx pins to WKUPTx pins. WKUP0, WKUP15 references
changed to WKUPx.
Figure 18-4 “Wake-up Sources”: Defined a section of the graphic as Low-power Tamper Detection Logic.
Section 18.3.7.2 “Low-power Tamper Detection and Anti-Tampering”: Changed all references to RTCOUT1
and RTCOUT 0 to RTCOUTx. Other minor modifications to improve clarity.
Figure 18-5 “Low-power Debouncer (Push-to-Make Switch, Pull-up Resistors)”, Figure 18-6 “Low-power
Debouncer (Push-to-Break Switch, Pull-down Resistors)”, Figure 18-7 “Using WKUP Pins Without RTCOUTx
Pins”: Modified pin names.
Added Section 18.3.8 “Register Write Protection”. In Section 18.4.9 “System Controller Write Protection Mode
Register”, updated register name and bit descriptions.
Added Section 18.3.9 “Register Bits in Backup Domain (VDDIO)”.
Section 18.4.3 “Supply Controller Control Register”: Added sentence on WPEN bit below register table and
added note to descriptions of bits VROFF and XTALSEL indicating the bits are in the backup domain.
Section 18.4.5 “Supply Controller Mode Register”: Added sentence on WPEN bit below register table and
added note to all bit descriptions except bit KEY indicating the bits are in the backup domain
Section 18.4.4 “Supply Controller Supply Monitor Mode Register”, , Section 18.4.6 “Supply Controller Wake-up
Mode Register” and Section 18.4.7 “Supply Controller Wake-up Inputs Register”: Added sentence on WPEN
bit below register table and added a sentence below the register tables stating that the register is located in the
backup domain
Section 18.4.7 “Supply Controller Wake-up Inputs Register”: corrected register name (was “System Controller
Wake-Up Inputs Register”)
Table 48-1. SAM4S Datasheet Rev. 11100F 29-Jan-14 Revision History (Continued)
Doc. Date Changes