Datasheet

1121
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
44.4.3.3 SAM4SD32/SD16/SA16 Active Power Consumption
Notes: 1. Flash Wait State (FWS) in EEFC_FMR adjusted versus core frequency
Figure 44-12. SAM4SD32/SD16/SA16 Current Consumption in Active Mode (AMP1) versus Master Clock Ranges
Table 44-23. SAM4SD32/SA16/SD16 Active Power Consumption with VDDCORE @ 1.2V running from Flash Memory
(IDDCORE- AMP1) or SRAM
Core Clock (MHz)
CoreMark
Unit
Cache Enable (CE) Cache Disable (CD)
SRAM
128-bit Flash
access
(1)
64-bit Flash
access
(1)
128-bit Flash
access
(1)
64-bit Flash
access
(1)
120 20.7 20.7 24.8 18.1 19.9
mA
100 17.5 17.4 21.6 16.5 16.8
84 14.7 14.7 18.3 13.9 14.2
64 11.3 11.3 14.4 11.5 10.9
48 8.5 8.5 11.3 9.4 8.3
32 5.7 5.7 8.0 7.1 5.6
24 4.3 4.3 6.3 5.9 4.2
12 2.5 2.5 3.5 3.3 1.9
8 1.7 1.7 2.4 2.3 1.7
4 0.9 0.9 1.2 1.2 0.7
2 0.5 0.5 0.7 0.7 0.5
1 0.4 0.4 0.5 0.5 0.4
0.5 0.3 0.3 0.3 0.3 0.3
0.0
5.0
10.0
15.0
20.0
25.0
0 20406080100120
Flash128 (CD) mA
Flash64 (CE) mA
Flash128 (CE) mA
Flash64 (CD) mA
SRAM mA