Datasheet

1073
SAM4S Series [DATASHEET]
11100F–ATARM–29-Jan-14
42.7.17 ADC Channel Offset Register
Name: ADC_COR
Address: 0x4003804C
Access: Read/Write
This register can only be written if the WPEN bit is cleared in the “ADC Write Protection Mode Register” .
• OFFx: Offset for channel x
0: No offset.
1: Centers the analog signal on Vrefin/2 before the gain scaling. The offset applied is: (G-1)Vrefin/2
where G is the gain applied (see the description of “ADC Channel Gain Register” ).
• DIFFx: Differential inputs for channel x
0: Single-ended mode.
1: Fully differential mode.
31 30 29 28 27 26 25 24
DIFF15 DIFF14 DIFF13 DIFF12 DIFF11 DIFF10 DIFF9 DIFF8
23 22 21 20 19 18 17 16
DIFF7 DIFF6 DIFF5 DIFF4 DIFF3 DIFF2 DIFF1 DIFF0
15 14 13 12 11 10 9 8
OFF15 OFF14 OFF13 OFF12 OFF11 OFF10 OFF9 OFF8
76543210
OFF7 OFF6 OFF5 OFF4 OFF3 OFF2 OFF1 OFF0