Datasheet

872
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
The comparison match and the comparison update can be source of an interrupt, but only if it is enabled and not
masked. These interrupts can be enabled by the “PWM Interrupt Enable Register 2” and disabled by the “PWM Interrupt
Disable Register 2” . The comparison match interrupt and the comparison update interrupt are reset by reading the
“PWM Interrupt Status Register 2” .
Figure 38-15.Comparison Waveform
CCNT0
CVUPD 0x6 0x2
CVMVUPD
CV
0x6
0x2
0x6
0x6
CVM
Comparison Update
CMPU
CTRUPD 0x1 0x2
CPR 0x1 0x3
0x0 0x1 0x0 0x1 0x0 0x1 0x2 0x3 0x0 0x1 0x2 0x3
CPRCNT
0x0 0x1 0x2 0x3 0x0 0x1 0x2 0x0 0x1 0x2 0x0 0x1
CUPRCNT
CPRUPD 0x1 0x3
CUPRUPD 0x3 0x2
CTR 0x1 0x2
CUPR 0x3 0x2
Comparison Match
CMPM