Datasheet

633
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
33.7.2 Modes of Operation
The TWI has different modes of operations:
 Master transmitter mode
 Master receiver mode
 Multi-master transmitter mode
 Multi-master receiver mode
 Slave transmitter mode
 Slave receiver mode
These modes are described in the following chapters.
33.8 Master Mode
33.8.1 Definition
The Master is the device that starts a transfer, generates a clock and stops it.
33.8.2 Application Block Diagram
Figure 33-5. Master Mode Typical Application Block Diagram
33.8.3 Programming Master Mode
The following registers have to be programmed before entering Master mode:
1. DADR (+ IADRSZ + IADR if a 10 bit device is addressed): The device address is used to access slave devices in
read or write mode.
2. CKDIV + CHDIV + CLDIV: Clock Waveform.
3. SVDIS: Disable the slave mode.
4. MSEN: Enable the master mode.
Host with
TWI
Interface
TWD
TWCK
Atmel TWI
Serial EEPROM
ICRTC
ICLCD
Controller
Slave 1 Slave 2 Slave 3
VDD
ICTemp.
Sensor
Slave 4
Rp: Pull up value as given by the I C Standard
Rp Rp