Datasheet

562
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
31.7 Functional Description
This chapter contains the functional description of the following: SSC Functional Block, Clock Management, Data format,
Start, Transmitter, Receiver and Frame Sync.
The receiver and transmitter operate separately. However, they can work synchronously by programming the receiver to
use the transmit clock and/or to start a data transfer when transmission starts. Alternatively, this can be done by
programming the transmitter to use the receive clock and/or to start a data transfer when reception starts. The transmitter
and the receiver can be programmed to operate with the clock signals provided on either the TK or RK pins. This allows
the SSC to support many slave-mode data transfers. The maximum clock speed allowed on the TK and RK pins is the
master clock divided by 2.
Figure 31-3. SSC Functional Block Diagram
31.7.1 Clock Management
The transmitter clock can be generated by:
 an external clock received on the TK I/O pad
 the receiver clock
 the internal clock divider
The receiver clock can be generated by:
 an external clock received on the RK I/O pad
User
Interface
APB
MCK
Re ce i ve Cl o ck
Controller
TX Clock
RK Inpu
t
Clock Output
C
ontroller
Frame Sync
Controller
Transmit Clock
Controller
Transmit ShiftRegister
St a r t
Se l e c t o r
St a r t
Se l e c t o r
Transmit Sync
Holding Register
Transmit Holding
Re g i s t er
RX c l o ck
TX c
lock
TK Input
RD
RF
RK
Clock Output
Controller
Frame Sync
Controller
Re ce i ve Sh i f t Reg i st e r
Re ce i ve Syn c
Holding Register
Re ce i ve H o l d i n g
Register
TD
TF
TK
RX Cl o c k
Re ce i ve r
Transmitter
Data
Controller
TXEN
Data
Controller
RF
TF
RX St a r t
RX EN
RC0R
TX Start
Interrupt Control
To Interrupt Controller
Clock
Divider
RX St a r t
TX Start