Datasheet

197
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
12.9.1.8 System Handler Priority Registers
The SCB_SHPR1-SCB_SHPR3 registers set the priority level, 0 to 15 of the exception handlers that have configurable priority.
They are byte-accessible.
The system fault handlers and the priority field and register for each handler are:
Each PRI_N field is 8 bits wide, but the processor implements only bits [7:4] of each field, and bits [3:0] read as zero and ignore
writes.
12.9.1.9 System Handler Priority Register 1
Name: SCB_SHPR1
Access: Read-write
Reset: 0x000000000
• PRI_6: Priority
Priority of system handler 6, UsageFault.
• PRI_5: Priority
Priority of system handler 5, BusFault.
• PRI_4: Priority
Priority of system handler 4, MemManage.
Table 12-33. System Fault Handler Priority Fields
Handler Field Register Description
Memory management fault (MemManage) PRI_4
“System Handler Priority Register 1” Bus fault (BusFault) PRI_5
Usage fault (UsageFault) PRI_6
SVCall PRI_11 “System Handler Priority Register 2”
PendSV PRI_14
“System Handler Priority Register 3”
SysTick PRI_15
31 30 29 28 27 26 25 24
–
23 22 21 20 19 18 17 16
PRI_6
15 14 13 12 11 10 9 8
PRI_5
76543210
PRI_4