Datasheet

SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
900
38.13 Register Write Protection
To prevent any single software error from corrupting HSMCI behavior, certain registers in the address space can
be write-protected by setting the WPEN bit in the “HSMCI Write Protection Mode Register” (HSMCI_WPMR).
If a write access to a write-protected register is detected, the WPVS bit in the “HSMCI Write Protection Status
Register” (HSMCI_WPSR) is set and the field WPVSRC indicates the register in which the write access has been
attempted.
The WPVS bit is automatically cleared after reading the HSMCI_WPSR.
The following registers can be protected:
 “HSMCI Mode Register” on page 903
 “HSMCI Data Timeout Register” on page 905
 “HSMCI SDCard/SDIO Register” on page 906
 “HSMCI Completion Signal Timeout Register” on page 911
 “HSMCI Configuration Register” on page 925