Datasheet

707
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
34.8.9 Read-write Flowcharts
The following flowcharts shown in Figure 34-16 on page 708, Figure 34-17 on page 709, Figure 34-18 on page
710, Figure 34-19 on page 711 and Figure 34-20 on page 712 give examples for read and write operations. A
polling or interrupt method can be used to check the status bits. The interrupt method requires that the interrupt
enable register (TWI_IER) be configured first.
Figure 34-15. TWI Write Operation with Single Data Byte without Internal Address
Set TWI clock
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
(Needed only once)
Set the Control register:
- Master enable
TWI_CR = MSEN + SVDIS
Set the Master Mode register:
- Device slave address (DADR)
- Transfer direction bit
Write ==> bit MREAD = 0
Load Transmit register
TWI_THR = Data to send
Read Status register
TXRDY = 1?
Read Status register
TXCOMP = 1?
Transfer finished
Ye s
Ye s
BEGIN
No
No
Write STOP Command
TWI_CR = STOP