Datasheet

SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
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Notes: 1. Describes access type during program execution in thread mode and Handler mode. Debug access can differ.
2. An entry of Either means privileged and unprivileged software can access the register.
12.4.1.4 General-purpose Registers
R0–R12 are 32-bit general-purpose registers for data operations.
12.4.1.5 Stack Pointer
The Stack Pointer (SP) is register R13. In Thread mode, bit[1] of the Control Register indicates the stack pointer to
use:
 0 = Main Stack Pointer (MSP). This is the reset value.
 1 = Process Stack Pointer (PSP).
On reset, the processor loads the MSP with the value from address 0x00000000.
12.4.1.6 Link Register
The Link Register (LR) is register R14. It stores the return information for subroutines, function calls, and
exceptions. On reset, the processor loads the LR value 0xFFFFFFFF
.
12.4.1.7 Program Counter
The Program Counter (PC) is register R15. It contains the current program address. On reset, the processor loads
the PC with the value of the reset vector, which is at address 0x00000004. Bit[0] of the value is loaded into the
EPSR T-bit at reset and must be 1.
Fault Mask Register FAULTMASK Read/Write Privileged 0x00000000
Base Priority Mask Register BASEPRI Read/Write Privileged 0x00000000
Control Register CONTROL Read/Write Privileged 0x00000000
Table 12-2. Core Processor Registers
Register Name Access
(1)
Required
Privilege
(2)
Reset