Datasheet

SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
534
• PLLBDIV2: PLLB Divisor by 2
PLLBDIV2 PLLB Clock Division
0 PLLB clock frequency is divided by 1.
1 PLLB clock frequency is divided by 2.